Inhibit Gate
The Inhibit gate is used to indicate that the output occurs when the input events (l1 and l2) occur and the input condition (C) is satisfied. The output of an Inhibit gate can be a top event or an intermediate event. The input events can be basic events, intermediate events or a combination of both.
Logic Summary
If all input events and the input condition are true (T), then the output is true (T). Table 5-4 shows the input and output events for an Inhibit gate.
Table 5-4. Truth Table for Inhibit Gate
I1
I2
C
Output
T
T
T
T
T
T
F
F
T
F
T
F
T
F
F
F
F
T
T
F
F
T
F
F
F
F
T
F
F
F
F
F